1. Field of the Invention
The invention relates to the field of computer electronics, and in particular, to a system and method for enabling low-power universal serial bus communications.
2. Related Art
The universal serial bus (USB) protocol is a popular communications protocol that allows a wide range of modern electronic devices and peripherals (e.g., scanners, digital cameras, personal digital assistants, and digital music players) to communicate with another peripheral. The present USB 2.0 specification (“Universal Serial Bus Specification”, Revision 2.0, Apr. 27, 2000) defines three signaling levels that can be supported by USB-compliant devices. The three levels include a low-speed mode operating at 1.5 Mbps at 3.3 V, a full-speed mode operating at 12 Mbps at 3.3 V, and a high-speed mode that signals at 480 Mbps at 400 mV.
Modern high-speed USB 2.0-compliant devices include USB transmitters having 3.3V output drivers. For example, FIG. 4 shows a USB transmitter 10, which is part of a first device (apparatus) that generates a USB signal that is transmitted to a second device (not shown) having a USB receiver. A USB cable (not shown) typically connects a USB port 11 on USB transmitter 10 to a corresponding USB port on the USB receiver device (not shown) to enable communication between the two devices.
USB communications utilize a four-line serial data bus that transmits signals between corresponding pins (e.g., pin 12 of USB port 11) of USB transmitter 10 and the non-illustrated USB receiver. Two of these lines are power lines (i.e., VBUS and ground lines), and the other two lines form a pair of differential signal lines (i.e., D+ and D− lines). For clarity, communication signals generated by high-speed USB transmitter 10 will be described herein with reference to only one half of the differential USB signal (i.e., with respect to signal D+, which is transmitted from pin 12). The inverted signal forming the other half of the differential USB signal (i.e., the D− signal) is generated in a manner substantially similar to that described with respect to the generation of the D+ signal.
In accordance with the USB 2.0 specification, data signal D+ is required to have a signal swing of 3.3V in full-speed and low-speed modes (i.e., 0V to 3.3V) and must be 5V tolerant. To meet this requirement, conventional USB transmitter 10 includes an output predriver 13, a 3.3V PMOS pullup transistor 14 and a 3.3V NMOS pulldown transistor 15 that are connected to an output terminal of output predriver 13, and a 45Ω termination (output) resistor ROUT, which is connected between pin 11 and the drain terminals of both PMOS pullup transistor 14 and NMOS pulldown transistor 15. Output predriver 13 converts an internal data signal DATA (which typically has a voltage range of 0V to 1.2V) to a pullup/pulldown signal VPU/PD having a voltage range of 0V to 3.3V that is applied the gate terminals of PMOS pullup transistor 14 and NMOS pulldown transistor 15. With this arrangement, depending on the state of pullup/pulldown signal VPU/PD, data pin 12 is either pulled up to 3.3V (e.g., when pullup/pulldown signal VPU/PD is 0V) or pulled down to 0V (e.g., when pullup/pulldown signal VPU/PD is 3.3V).
A problem with conventional USB transmitter 10 is that leading edge CMOS fabrication processes (nodes) typically do not support 3.3V devices (i.e., at 65 nm and below the current designs are not portable). Even in fabrication processes where a 3.3V device is supported, it is often used only for USB purposes and hence adds additional mask cost, which increases the overall production costs of USB devices.
One approach to avoiding the use of 3.3V devices in the production of USB devices is to fabricate the pullup and pulldown transistors of USB transmitter 10 using more conventional 2.5V devices. However, simply replacing the 3.3V devices with a 2.5V PMOS pullup transistor 14 and a 2.5V NMOS pulldown transistor 15 subjects these 2.5V devices to stress (e.g., 2.5V PMOS pullup transistor 14 is subjected to a 3.3V gate-to-source voltage when pullup/pulldown signal VPU/PD is 0V, and 2.5V NMOS pulldown transistor 15 is subjected to a 3.3V gate-to-source voltage when pullup/pulldown signal VPU/PD is 3.3V). Even greater stresses are generated during 5V short conditions (i.e., a 5V signal applied to pin 12 from an external source, not shown). Longer gate lengths are required to mitigate device degradation or failure. This approach requires accurate models that account for device degradation over time, and is typically not acceptable to most USB customers.
Accordingly, what is needed is a 3.3V USB transmitter output stage in which the transistors are not subjected to stress-inducing potentials (i.e., greater than 2.5V), even during 5V short conditions, thereby facilitating the use of 2.5V transistors without the risk of damage.